1. Field
Exemplary embodiments of the present disclosure relate to chip-to-chip communications.
2. Description of the Related Art
Recently, load of memory systems s getting higher. For example, in chip-to-chip communications with Mbps toggle rate in the hundreds, a transmission line is not long enough (i.e., only a few inches) to cause any significant attenuation on signals. Therefore, the speed is mostly limited by the receiver's load. In some applications such as NAND flash storage, a driver of controller chip needs to drive multiple chips or multiple dies packed in the same chip. In either scenario, the total lumped load can easily go up to 20 to 30 pF or more. Due to heavier loads contributed by multi pie dies and higher speed requirements, there is a strong bottleneck in the chip-to-chip communications. Therefore, there is a need to provide a scheme to solve the bottling of the heavy load and the higher speed requirements in chip-to-chip communications.